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CAIE 9618 · Paper 1 · Topic 1.3.3

Assembly Language &
Instruction Sets

Mnemonics · CAIE Assembly Instructions · Addressing Modes · Trace Tables

CSZone Cambridge International AS & A Level Computer Science 9618
What is Assembly Language?

Low-Level, Human-Readable Code

Assembly language is a low-level programming language that uses mnemonics (human-readable abbreviations) to represent machine code instructions. Each mnemonic maps 1-to-1 to a machine code opcode. It is processor-specific (different CPUs have different instruction sets).
ADVANTAGES
Direct hardware control. Maximum efficiency. No compiler overhead. Used in device drivers, OS kernels, embedded systems.
DISADVANTAGES
Hard to write and debug. Not portable — processor-specific. Takes many instructions to do simple tasks. Requires knowledge of hardware registers.
CAIE Assembly Instruction Set

Key Instructions You Must Know

MnemonicMeaningExample
LDM #nLoad immediate value n into ACCLDM #5 → ACC = 5
LDD addrLoad value at memory address into ACCLDD 100 → ACC = Mem[100]
STO addrStore ACC value at memory addressSTO 200 → Mem[200] = ACC
ADD addrAdd value at address to ACCADD 100 → ACC = ACC + Mem[100]
SUB addrSubtract value at address from ACCSUB 100 → ACC = ACC - Mem[100]
INC regIncrement register by 1INC ACC → ACC = ACC + 1
DEC regDecrement register by 1DEC IX
More CAIE Instructions

Branching and I/O

MnemonicMeaningNotes
JMP labelUnconditional jump to labelAlways jumps
JPE labelJump if ACC = 0 (Equal)After CMP
JPN labelJump if ACC ≠ 0 (Not equal)After CMP
CMP addr/#nCompare ACC with value — sets flagsDoesn't change ACC
INInput a character into ACC (ASCII)From keyboard
OUTOutput ACC value as characterASCII to screen
AND addr/#nBitwise AND with ACCMask operations
OR addr/#nBitwise OR with ACCSet bits
XOR addr/#nBitwise XOR with ACCFlip bits
LSL n / LSR nLogical shift left/right by n bits×2 / ÷2 per shift
ENDStop program executionRequired at end
Addressing Modes

How Operands are Interpreted

IMMEDIATE ADDRESSING — LDM #n
The operand IS the value itself. LDM #42 — loads the literal value 42 into ACC. Fast, but fixed — value cannot change during runtime.
DIRECT ADDRESSING — LDD addr
The operand is a memory address. LDD 100 — loads whatever value is stored at memory address 100.
INDIRECT ADDRESSING — LDI addr
The operand is an address that contains another address. LDI 100 — reads Mem[100] to get an address, then loads from that address.
INDEXED ADDRESSING — LDX addr
LDX 100 — loads from address 100 + Index Register (IX). Useful for arrays.
Trace Tables

Tracing Assembly Code Execution

LDM #10 ; ACC ← 10 STO 200 ; Mem[200] ← 10 LDM #5 ; ACC ← 5 ADD 200 ; ACC ← 5 + 10 = 15 STO 201 ; Mem[201] ← 15 END
TRACE TABLE RESULT
After line 1: ACC = 10  |  After line 2: Mem[200] = 10  |  After line 3: ACC = 5
After line 4: ACC = 15  |  After line 5: Mem[201] = 15
Exam Practice

Cambridge-style questions

Question 1
Trace the following assembly code. Show the value of ACC and memory locations after each instruction.
LDM #8 / STO 100 / LDM #3 / SUB 100 / STO 101 / END
4 marks
1 mark
LDM #8 → ACC = 8
1 mark
STO 100 → Mem[100] = 8, ACC = 8
1 mark
LDM #3 → ACC = 3
1 mark
SUB 100 → ACC = 3 – 8 = –5 · STO 101 → Mem[101] = –5
Common Mistakes

Don't lose easy marks

1
Confusing LDM #n and LDD addr: LDM #5 loads the literal value 5 into ACC. LDD 5 loads the value stored at memory address 5. The # symbol always means "immediate" (the value itself).
2
Saying CMP changes ACC — CMP compares ACC with a value and sets status flags, but it does not modify the ACC. Only ADD, SUB, and logical operations change the ACC.
3
Forgetting that SUB subtracts from ACCSUB 100 means ACC = ACC – Mem[100], not Mem[100] – ACC. Always check which way round the subtraction goes.
Topic Summary — 1.3.3

What You Need to Know

KEY INSTRUCTIONS
LDM #n → immediate load
LDD addr → direct load from memory
STO addr → store ACC to memory
ADD/SUB → arithmetic on ACC
CMP → compare, sets flags only
JPE/JPN/JMP → branching
AND/OR/XOR/LSL/LSR → bit ops
ADDRESSING MODES
Immediate (#n): operand IS the value
Direct (addr): operand = address
Indirect: address of address
Indexed: base address + IX register
Symbolic: using labels (e.g. loop names)
TRACE TABLES
Track ACC, registers, memory addresses
Update after EACH instruction
CMP doesn't change ACC
STORE copies ACC → memory
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1.3.4
Input, Output & Storage
I/O Devices · Secondary Storage · Characteristics
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