Edexcel 4CP0 · Topic 4 · 4.1

Computers & the
Problem-Solving Process

Von Neumann · CPU components · Fetch-Decode-Execute

CSZone Edexcel iGCSE Computer Science 4CP0

Von Neumann Architecture

The foundation of modern computers

Proposed by John von Neumann in 1945

Key idea: stored program concept — instructions and data both stored in the same memory

Before this, computers were rewired for each new task

All modern computers follow this architecture

FOUR MAIN COMPONENTS

CPU — Central Processing Unit (processes instructions)

Memory (RAM) — stores current program and data

Input devices — keyboard, mouse, microphone

Output devices — monitor, printer, speakers

CPU Components

Inside the processor

Component	Full name	Role
PC	Program Counter	Holds the address of the next instruction to fetch
MAR	Memory Address Register	Holds the address of memory to be accessed
MDR	Memory Data Register	Holds data read from / to be written to memory
CIR	Current Instruction Register	Holds the instruction currently being decoded & executed
ACC	Accumulator	Holds results of calculations performed by the ALU
ALU	Arithmetic Logic Unit	Performs calculations and logical operations
CU	Control Unit	Coordinates all CPU activity — manages FDE cycle

Fetch-Decode-Execute Cycle

How the CPU processes instructions

FETCH

PC → MAR
Instruction copied from memory (at address MAR) into MDR
MDR → CIR
PC incremented (+1)

DECODE

CU interprets the instruction in the CIR
Breaks it into opcode + operand
Determines what action is needed

EXECUTE

Instruction is carried out
ALU performs calculation if arithmetic
Result stored in Accumulator
Back to Fetch

CPU Performance

What makes a CPU faster?

CLOCK SPEED

Measured in GHz. A faster clock means more FDE cycles per second → faster processing. Doubled clock speed ≈ doubled speed.

NUMBER OF CORES

Each core can process instructions independently. Dual-core = 2 cores. More cores allow parallel processing of multiple tasks.

CACHE SIZE

Cache is very fast memory built into the CPU. Larger cache means more instructions/data stored close to the CPU → fewer slow main memory accesses.

Exam Practice

Question

Describe the role of the Program Counter (PC) and the Memory Address Register (MAR) in the fetch stage of the FDE cycle.

4 marks

✓ MARK SCHEME

PC: holds the address of the next instruction to be fetched (1)
The address in the PC is copied to the MAR (1)
MAR: holds the memory address to be accessed (1)
The PC is then incremented to point to the next instruction (1)

Common Mistakes

CPU pitfalls

1

Confusing MAR and MDR. MAR = address of where to look in memory. MDR = the data at that address. MAR is like a postcode; MDR is the letter inside the house.

2

Forgetting the PC increments during the Fetch stage. After copying the address to MAR, the PC immediately adds 1 to point to the next instruction, before Execute has even happened.

3

Saying the CU "processes" data. The ALU processes/calculates data. The CU (Control Unit) coordinates and controls the FDE cycle — it directs traffic but doesn't calculate.

Topic Summary — 4.1

Key Takeaways

KEY REGISTERS

PC → next instruction address
MAR → address to access
MDR → data read/written
CIR → current instruction
ACC → calculation result

FDE CYCLE

Fetch — PC→MAR, mem→MDR→CIR, PC+1
Decode — CU interprets CIR
Execute — ALU acts, result in ACC

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Next Lesson

4.2

Memory & Storage

RAM · ROM · Primary vs Secondary storage

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