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OCR J277 · Component 2 · Topic 2.4.1b

Boolean Logic
Truth Tables

Building, completing and reading truth tables for multi-gate logic circuits

CSZone OCR GCSE Computer Science J277
Learning Objectives

By the end of this video you will be able to...

Set up a truth table correctly for any single or multi-gate circuit — listing every possible input combination in order, with one column per input, one column per intermediate signal, and one column for the final output
Complete a two-input truth table (4 rows) for circuits combining two logic gates — applying each gate's rule in turn and filling an intermediate column before calculating the final output
Construct a three-input truth table (8 rows) for circuits with inputs A, B and C — listing combinations 000 through 111 in binary order and working through each gate stage by stage
Write a Boolean expression for the output of any circuit by reading the gates left to right — and reverse the process by converting a Boolean expression back into a circuit diagram
Identify the output of any input row in a multi-gate circuit without re-drawing the table — by tracing through each gate one at a time and applying its rule to the values you already know
⚡ Every multi-mark Boolean logic question in the OCR exam asks you to complete a truth table for a circuit. Master the systematic column-by-column method and these questions become routine.
Method

How to tackle any truth table question

THREE-STEP METHOD
1Set up columns — one per input, one per intermediate signal, one for the final output Q
2List all input combinations — in binary counting order (00→11 for 2 inputs; 000→111 for 3 inputs)
3Fill left to right — complete each gate's output column before moving to the next gate. Never skip ahead
NUMBER OF ROWS
Rows = 2n where n = number of inputs.
1 input (NOT) → 2 rows
2 inputs (AND/OR/etc.) → 4 rows
3 inputs → 8 rows
The exam will always give you enough rows — count them first to check you have the right number.
THE THREE CORE GATES — QUICK REMINDER
GateRuleOutput 1 when
NOTInvert inputA = 0
ANDAll inputs = 1A=1 AND B=1
ORAny input = 1A=1 OR B=1
Note: The OCR spec names AND, OR and NOT as the three core gates. NAND, NOR and XOR (from the previous video) may also appear — apply the same column-by-column method to them.
WHAT IS AN INTERMEDIATE COLUMN?
When a circuit has two gates in series, the output of the first gate feeds into the second. That output is an intermediate signal — usually labelled P, X, or similar. It gets its own column in the table. Without it, you cannot work out the final output correctly.
Two-Gate Circuit

Circuit 1 — NOT into AND

CIRCUIT
Input A feeds through a NOT gate → output P.
P and input B feed into an AND gate → final output Q.
Boolean expression: Q = A · B
A B P Q AND
STEP 1 — FIND P (NOT A)
P = NOT A. When A=0, P=1. When A=1, P=0. Fill the P column before touching Q.
STEP 2 — FIND Q (P AND B)
Q = P AND B. Use P from column 3 and B from column 2. Output 1 only when both P and B are 1.
COMPLETE TRUTH TABLE
ABP = AQ = P · B
0010
0111
1000
1100
Yellow = intermediate column (marker checks this separately). Purple = final output (marks here too).
OBSERVATION
Q = 1 only in one case: A=0, B=1. In words: "B is true and A is false." The NOT gate on A means A must be off before the AND gate will pass B through. This pattern is sometimes called "B but not A."
Two-Gate Circuit

Circuit 2 — NOT into OR

CIRCUIT
Input A feeds through a NOT gate → output P.
P and input B feed into an OR gate → final output Q.
Boolean expression: Q = A + B
A B P Q
STEP 1 — FIND P (NOT A)
P = NOT A. When A=0 → P=1. When A=1 → P=0. Same as before — fill this column first.
STEP 2 — FIND Q (P OR B)
Q = P OR B. Output 1 when P=1 OR B=1. Only 0 when both P and B are 0.
COMPLETE TRUTH TABLE
ABP = AQ = P + B
0011
0111
1000
1101
Compare Circuit 1 (NOT→AND) with Circuit 2 (NOT→OR): same P column but very different Q columns — choosing AND vs OR dramatically changes the behaviour.
CIRCUIT 1 vs CIRCUIT 2 — SIDE BY SIDE
ABNOT→ANDNOT→OR
0001
0111
1000
1101
Three Inputs

Three-input circuits — 8 rows

WHY 8 ROWS?
With 3 inputs (A, B, C), each can be 0 or 1. That gives 2 × 2 × 2 = 8 combinations. You list them in binary counting order — starting at 000 and ending at 111. Think of the A column as the hundreds column of a binary number, B as tens, C as units.
PATTERN TO REMEMBER
C column (rightmost input): alternates every row → 0,1,0,1,0,1,0,1
B column: alternates every 2 rows → 0,0,1,1,0,0,1,1
A column: alternates every 4 rows → 0,0,0,0,1,1,1,1
EXAM TECHNIQUE
Fill the input columns first using the pattern above — before touching any gate output. This guarantees you never miss a row or repeat a combination. The examiner checks all 8 rows, so a missing row costs marks.
TEMPLATE — 3 INPUTS, 2 GATES
ABCP = ?Q = ?
000
001
010
011
100
101
110
111
The input columns follow the pattern exactly: A changes every 4 rows, B every 2, C every row. Memorise this pattern and you'll never have to think about it — just write it out automatically.
Three-Input Circuit

Circuit 3 — AND into OR (three inputs)

CIRCUIT
Inputs A and B feed into an AND gate → P.
P and input C feed into an OR gate → Q.
Boolean: Q = (A · B) + C
A B C AND P Q
HOW TO FILL
P column first: P = A AND B → only 1 when both A and B are 1 (rows 7 and 8).
Q column second: Q = P OR C → 1 when P=1 OR C=1.
COMPLETED TRUTH TABLE
ABCP=A·BQ=P+C
00000
00101
01000
01101
10000
10101
11011
11111
P is 1 in only 2 of 8 rows (when A=1 AND B=1). C alone can make Q=1 in another 4 rows. The OR gate makes Q=1 in 5 of 8 rows total — OR is always generous.
Three-Input Circuit

Circuit 4 — OR and NOT into AND

CIRCUIT — TWO GATE OUTPUTS COMBINE
A and B feed into an OR gate → P.
C feeds through a NOT gate → X.
P and X feed into an AND gate → Q.
Boolean: Q = (A + B) · C
A B C P X AND Q
TWO INTERMEDIATE COLUMNS
P = A OR B — 1 when A=1 or B=1 (0 only when A=0 and B=0)
X = NOT C — simply inverts C. When C=0, X=1. When C=1, X=0.
COMPLETED TRUTH TABLE
ABCP=A+BX=CQ=P·X
000010
001000
010111
011100
100111
101100
110111
111100
Two intermediate columns — P and X — are both needed. The AND gate at the end is strict: P must be 1 AND X must be 1. Notice Q=1 only when (A or B is 1) AND C=0. The NOT gate on C means C must be off for the circuit to pass a signal through.
Boolean Expressions

Reading and writing Boolean expressions

EXPRESSION → CIRCUIT
Given: Q = A + B

1. Identify the outermost operation: + (OR gate) → final gate is OR
2. Left input to OR: A → that's A through a NOT gate → intermediate P
3. Right input to OR: B → direct wire
Result: A → NOT → P, then P and B → OR → Q
READING ORDER — INSIDE → OUT
Brackets or overbars are computed first (innermost gates). The outermost operator is always the last gate — closest to the output Q. Work inside-out when reading an expression, left-to-right when drawing the circuit.
NOTATION SUMMARY
SymbolMeansGate
ANOT ANOT
A · BA AND BAND
A + BA OR BOR
CIRCUIT → EXPRESSION
Given a circuit: A and B → AND → P, then P and C → OR → Q.

1. Write the output of the first gate: P = A · B
2. Substitute P into the next gate: Q = P + C
3. Replace P: Q = (A · B) + C
BRACKETS = INTERMEDIATE GATE
Whenever you substitute one gate's output into another, wrap it in brackets. (A · B) + C tells you: compute A AND B first (intermediate P), then OR that result with C. The brackets correspond exactly to the intermediate signal column in your truth table.
PRACTICE — MATCH THE EXPRESSION
A · B→ NOT A, then AND with B
(A + B) · C→ OR first, then AND with C
(A · B) + C→ AND + NOT C, then OR
Worked Example

Full worked example — three gates, two inputs

CIRCUIT
A → NOT → P
P and B → AND → X
A and B → OR → Y
X and Y → OR → Q

Boolean: Q = (A · B) + (A + B)
FILL ORDER — 4 EXTRA COLUMNS
Step 1: P = NOT A
Step 2: X = P AND B
Step 3: Y = A OR B
Step 4: Q = X OR Y
INTERESTING RESULT
Look at the Q column — it equals the OR gate output in every row. That's because (A+B) already captures all the cases where Q=1. The first branch (A·B) is a subset of (A+B), so the final OR adds nothing new. A circuit can be simplified.
COMPLETED TRUTH TABLE
ABP=AX=P·BY=A+BQ=X+Y
001000
011111
100011
110011
Q column is identical to Y column — the three-gate circuit simplifies to a single OR gate. In an exam, mark each intermediate column carefully — you get marks for each correct column.
WHAT TO WRITE IN THE EXAM
Always show intermediate columns even if you spot a shortcut — the examiner awards marks per column. Getting X wrong but Q right (because you noticed the simplification) loses X marks while gaining Q marks. Show all working.
Exam Practice

Truth tables — exam questions

Question 1 — 1 mark
A circuit has input A feeding through a NOT gate to produce output Q. State the output Q when A = 1.
Answer — Q1
Q = 0. A NOT gate inverts its input — when A=1 the output is 0. (1 mark)
Question 2 — 3 marks
A logic circuit has inputs A and B. A and B feed into an OR gate to produce P. A feeds through a NOT gate to produce X. P and X feed into an AND gate to produce Q.

(a) Write a Boolean expression for Q. [1]
(b) Complete the truth table: [2]
ABPXQ
00???
01???
10???
11???
Answer — Q2
(a) Q = (A + B) · A [1]
(b)
ABPXQ
00010
01111
10100
11100
[1] P and X columns correct · [1] Q column correct
Question 3 — 4 marks
A logic circuit has three inputs A, B and C. Inputs A and B feed into an AND gate to produce P. Input C feeds through a NOT gate to produce X. P and X then feed into an OR gate to produce the final output Q.

(a) Write a Boolean expression for Q in terms of A, B and C. [1]
(b) Complete the truth table for this circuit. [3]
ABCPXQ
000???
001???
010???
011???
100???
101???
110???
111???
Exam Answers

Question 3 — mark scheme

MARK SCHEME
(a) Q = (A · B) + C  [1]
(b) [3 marks — see table]
ABCP=A·BX=CQ=P+X
000011
001000
010011
011000
100011
101000
110111
111101
[1] P column correct · [1] X column correct · [1] Q column correct
KEY OBSERVATION
Q = 0 only in rows where C=1 AND A and B are not both 1. The NOT on C means C=1 kills the X path; the AND on A·B means you need both to make P=1. Check the last row: P=1 AND X=0 but Q=P+X=1+0=1 — P alone is enough for OR.
COLUMN-BY-COLUMN APPROACH — ALWAYS
✓ Add a column for every intermediate signal (P, X, etc.) — even if the exam question doesn't show them. Examiners accept and reward this
✓ Fill P before X before Q — never work diagonally row by row
✓ A correct P column earns a mark even if Q is wrong — column marks are independent
QUICK REFERENCE — GATE RULES
GateOutput 0 whenOutput 1 when
NOTA = 1A = 0
ANDany input = 0all inputs = 1
ORall inputs = 0any input = 1
⚡ Exam tip: if a question asks "state the output Q when A=1, B=0, C=1" — you don't need to build the whole table. Just trace through the circuit: P = A·B = 1·0 = 0. X = NOT C = NOT 1 = 0. Q = P+X = 0+0 = 0. One value per gate, left to right.
Common Mistakes

Common mistakes — avoid these in the exam

MISTAKE 1 — Wrong number of rows
Students with two inputs write only 2 rows (treating it like a NOT gate), or with three inputs write only 4 rows (as if there were 2 inputs). The number of rows is 2n where n is the number of inputs. Two inputs = 4 rows. Three inputs = 8 rows. Counting rows first takes five seconds and prevents this error entirely
✓ Count inputs → 2n → draw all rows before filling any values
MISTAKE 2 — Wrong input combinations or wrong order
Students list inputs randomly (e.g. 00, 11, 01, 10) or repeat combinations, missing some rows. The correct order is binary counting: for two inputs 00→01→10→11; for three inputs 000→001→010→011→100→101→110→111. The column pattern (each input alternates at 1, 2, 4 row intervals) is the safest way to fill these
✓ Use the alternating pattern: rightmost input alternates every row, next every 2 rows, next every 4 rows
MISTAKE 3 — Skipping intermediate columns
Students try to jump straight from A and B to Q without working out P first. With two gates this sometimes works by luck, but with three gates it almost always leads to errors. More importantly, intermediate columns are worth separate marks — a correct P column earns a mark even if Q is wrong. Never skip them
✓ Add a column for every signal that is not an input and not the final output. Fill them in order, left to right
MISTAKE 4 — Applying the wrong gate rule
Students confuse AND and OR — writing 1 for AND when only one input is 1, or writing 0 for OR when at least one input is 1. AND is strict: ALL inputs must be 1. OR is generous: ANY input being 1 is enough. A single wrong gate rule corrupts an entire column. Check the gate symbol before filling each column
✓ Before filling a column, state the gate rule out loud: "AND — all must be 1." Then apply it row by row
Summary

Key points — 2.4.1b

A truth table lists every possible input combination and the corresponding output. Rows = 2n where n = number of inputs. Two inputs → 4 rows. Three inputs → 8 rows. Input combinations are listed in binary counting order: 00→01→10→11 for two inputs
For multi-gate circuits: always add a column for every intermediate signal. Fill columns left to right — complete the first gate's column before moving to the next. Skipping ahead causes errors and loses marks, since each column is marked independently
A Boolean expression describes the circuit in algebra. NOT A = A. A AND B = A·B. A OR B = A+B. Brackets show which gate is computed first. (A·B)+C means: compute A AND B first (intermediate P), then OR that result with C
To convert expression → circuit: identify the outermost operation (last gate), work inward for each operand. To convert circuit → expression: name each gate's output, substitute step by step, wrap in brackets where needed
To find the output for one specific input row without the full table: trace through the circuit gate by gate — compute each signal in order. P = ? then X = ? then Q = ? No need to build all rows if only one is asked for
⚡ Next topic: 2.5.1 — High and Low Level Languages and the purpose of translators.
2.4.1b Complete

Truth Tables
Multi-gate circuits · Three inputs · Boolean expressions

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