💻 Paper 1 · Topic 3: Hardware
3.1a The CPU & Von Neumann Architecture
Cambridge IGCSE Computer Science 0478 · ~14 min read · Free

The CPU

The Central Processing Unit (CPU) is the brain of the computer — it processes all instructions and data. The CPU has three main components:

Arithmetic and Logic Unit (ALU)

The ALU performs all arithmetic calculations (addition, subtraction, multiplication, division) and logical operations (comparisons such as AND, OR, NOT, greater than, equal to).

Control Unit (CU)

The Control Unit directs the operation of the processor. It fetches instructions from memory, decodes them, and coordinates the execution. It does not process data itself — it manages the flow.

Registers

Registers are small, extremely fast storage locations inside the CPU. They hold data and instructions currently being processed. Key registers include:

RegisterFunction
Program Counter (PC)Holds the memory address of the next instruction to be fetched
Memory Address Register (MAR)Holds the address in memory that is being read from or written to
Memory Data Register (MDR)Holds the data that has been fetched from or is to be written to memory
Current Instruction Register (CIR)Holds the current instruction being decoded and executed
Accumulator (ACC)Holds the result of arithmetic and logical operations in the ALU

Von Neumann Architecture

The Von Neumann model is the foundational design of modern computers. It defines a computer that:

  • Has a CPU containing a CU and ALU
  • Uses a stored program — both programs and data are stored in the same main memory (RAM)
  • Instructions are fetched sequentially from memory and executed one at a time
  • Communicates between components using buses (address bus, data bus, control bus)

The Three Buses

BusPurposeDirection
Address BusCarries memory addresses from CPU to memory/I-OOne-way (CPU → memory)
Data BusCarries actual data/instructions between CPU and memoryTwo-way
Control BusCarries control signals (read/write commands, clock signals)Two-way
Exam tip: Cambridge commonly asks you to state the function of specific CPU components. Make sure you know: ALU = arithmetic + logic operations; CU = directs and coordinates; PC = holds address of NEXT instruction; MAR = address being accessed; MDR = data to/from memory; CIR = current instruction; ACC = result of ALU.
⚠️ Common Mistakes
  • Saying the CU processes data — it doesn't; it directs and coordinates
  • Confusing the PC with a counter that counts how many instructions have run — it holds the ADDRESS of the NEXT instruction
  • Saying RAM stores only programs (not data) — Von Neumann's key idea is that BOTH programs and data share the same memory
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Worksheet — CPU & Von Neumann

5 questions · 10 marks

Q1State the role of the Arithmetic and Logic Unit (ALU) in a CPU.[2]
✅ Mark scheme
Performs arithmetic calculations (addition, subtraction, etc.) [1]; performs logical operations (comparisons: AND, OR, NOT, greater than, equal to, etc.) [1]
Q2Describe the function of the Program Counter (PC) register.[2]
✅ Mark scheme
The PC holds the memory address [1] of the next instruction to be fetched/executed [1]
Q3State two key features of the Von Neumann model of computer architecture.[2]
✅ Mark scheme
Both programs and data are stored in the same main memory [1]; instructions are fetched and executed sequentially by the CPU [1]; contains a CPU with CU and ALU [1] — any 2
Q4Explain the difference between the Memory Address Register (MAR) and the Memory Data Register (MDR).[2]
✅ Mark scheme
MAR holds the address in memory to be accessed (read from or written to) [1]; MDR holds the actual data/instruction that has been read from or is to be written to that memory location [1]
Q5State the purpose of the data bus and address bus in a computer system.[2]
✅ Mark scheme
Data bus: carries actual data and instructions between the CPU and memory (bidirectional) [1]; address bus: carries memory addresses from the CPU to memory to specify where to read/write (unidirectional) [1]
Quiz — CPU Architecture
Q 1 of 8
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/ 8
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Mini Test — CPU Architecture

10 minutes · mixed marks

← 2.3 Encryption Topic 3: Hardware Next: 3.1b Fetch-Execute →
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