CPU Registers
Registers are tiny, extremely fast storage locations inside the CPU. They hold the data being currently processed. Each register has a specific purpose:
| Register | Full name | Purpose |
|---|
| PC | Program Counter | Holds the memory address of the next instruction to be fetched; increments after each fetch |
| MAR | Memory Address Register | Holds the address of the memory location currently being accessed (read or written) |
| MDR | Memory Data Register | Holds the data that has just been fetched from memory, or data about to be written to memory |
| CIR | Current Instruction Register | Holds the instruction currently being decoded and executed |
| Accumulator | Accumulator | Holds the result of the most recent ALU calculation |
The Fetch-Execute Cycle
The CPU continuously repeats the fetch-execute cycle (also called the fetch-decode-execute cycle) to process a program. The steps are:
1. Fetch
- The address stored in the PC is copied to the MAR
- The instruction at that address is fetched from main memory into the MDR
- The PC is incremented (increased by 1) to point to the next instruction
- The instruction is copied from MDR to the CIR
2. Decode
- The Control Unit decodes the instruction in the CIR
- The CU identifies the operation code (opcode) and any operands
3. Execute
- The decoded instruction is carried out — this may involve the ALU (for arithmetic/logic), memory access (load/store), or jumping to a different address (branch)
- Results may be stored in the Accumulator or written back to memory
The cycle then repeats, fetching the next instruction (pointed to by the updated PC).
📝 Exam Tip: Know all five registers and their specific roles. A common exam question asks "what is the role of the MAR?" — answer: it holds the memory address of the data or instruction being read/written. Don't confuse MAR (address) with MDR (data).
⚠️ Common Mistakes
- Confusing MAR and MDR — MAR holds the ADDRESS, MDR holds the DATA at that address
- Saying the PC holds the current instruction — it holds the address of the NEXT instruction; the CIR holds the current instruction
- Forgetting that the PC increments during the fetch stage — this is what makes the CPU move to the next instruction automatically