📁 Component 1 · 1.1 Systems Architecture
1.1.1 Architecture of the CPU
OCR J277 · GCSE Computer Science · ~14 min read
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What is the CPU?

The Central Processing Unit (CPU) is the main processing component of a computer. It carries out the instructions of a program by performing arithmetic, logical, control and input/output operations specified by those instructions.

Modern CPUs are based on the Von Neumann architecture — a design where both program instructions and data are stored together in the same memory (RAM), and the CPU fetches, decodes and executes those instructions in sequence.

Key Components of the CPU

Control Unit (CU)

The Control Unit manages and coordinates all CPU operations. It:

  • Fetches instructions from memory
  • Decodes (interprets) those instructions
  • Controls the timing and sequence of all operations
  • Sends control signals to other CPU components

The CU does not perform calculations itself — that's the ALU's job.

Arithmetic Logic Unit (ALU)

The ALU performs all arithmetic and logical operations:

  • Arithmetic: addition, subtraction, multiplication, division
  • Logical: AND, OR, NOT comparisons
  • Comparison: equal to, greater than, less than

Registers

Registers are small, extremely fast memory locations located inside the CPU. They temporarily store data, addresses and instructions currently being used by the processor.

Register Full Name Purpose
PC Program Counter Holds the memory address of the next instruction to be fetched
MAR Memory Address Register Holds the address in memory that is being read from or written to
MDR Memory Data Register Holds the data being transferred to or from memory
CIR Current Instruction Register Holds the instruction currently being decoded and executed
ACC Accumulator Holds the results of ALU calculations

Cache

Cache is a small but extremely fast type of memory located very close to (or inside) the CPU. It stores copies of frequently used instructions and data so the CPU can retrieve them far faster than fetching from RAM.

Buses

Buses are electrical pathways that carry data, addresses and control signals between components:

  • Address bus: carries memory addresses from CPU to RAM (one-way)
  • Data bus: carries actual data between CPU and memory (two-way)
  • Control bus: carries control signals to coordinate components (two-way)

The Fetch-Decode-Execute (FDE) Cycle

The CPU processes instructions in a continuous, repeating three-stage cycle. This is the most commonly examined topic in this subtopic.

Stage 1: FETCH

  1. The address in the PC is copied to the MAR
  2. The CPU reads the instruction from RAM at the address in the MAR
  3. The instruction travels along the data bus into the MDR
  4. The instruction is copied from the MDR into the CIR
  5. The PC increments by 1 — ready to point to the next instruction

Stage 2: DECODE

The Control Unit decodes the instruction sitting in the CIR. It works out what operation needs to be carried out and what data is needed.

Stage 3: EXECUTE

The decoded instruction is carried out:

  • If it involves a calculation: the ALU performs it and stores the result in the Accumulator
  • If it involves data movement: data is moved between registers and/or memory
  • If it is a branch/jump: the PC is updated to point to a different instruction

The cycle then repeats for the next instruction — billions of times per second on a modern CPU.

Exam tip: The PC increments during the fetch stage — not at the end of execute. Many students lose marks by putting this in the wrong stage.
Exam tip: MAR holds an address. MDR holds data. Examiners frequently ask you to distinguish between these two registers — a question on MAR vs MDR is extremely common.
Exam tip: Von Neumann architecture is often the context for a 4-mark question. Key point: data and instructions are stored in the same memory.
⚠️ Common Mistakes
  • Saying the PC holds the current instruction — it holds the address of the next instruction
  • Confusing MAR (holds address) and MDR (holds data) — these are regularly swapped
  • Saying the PC increments during the execute stage — it increments during fetch
  • Saying cache stores everything — it only stores frequently accessed data and instructions
  • Confusing the CU (controls operations) with the ALU (performs calculations)
  • Saying the CIR holds the address of the instruction — it holds the instruction itself
✅ Notes completed — well done!
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Key points covered in this video

  • The role of the CPU and Von Neumann architecture
  • Functions of the Control Unit and ALU
  • All five key registers: PC, MAR, MDR, CIR, Accumulator
  • The Fetch-Decode-Execute cycle step by step
  • What cache is and why it improves performance
  • The three buses: address, data and control
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Exam-style Worksheet — 1.1.1 Architecture of the CPU

8 OCR J277-style questions · 20 marks total · Submit to see the full mark scheme

Q1 What does ALU stand for? [1 mark]
✅ Mark scheme
Mark scheme answer
Arithmetic Logic Unit
Q2 State the purpose of the Program Counter (PC). [1 mark]
✅ Mark scheme
Mark scheme answer
Holds/stores the memory address of the next instruction to be fetched (from memory). [1 mark]
Q3 Explain the difference between the MAR and the MDR. [2 marks]
✅ Mark scheme
Mark scheme answer
The MAR (Memory Address Register) holds the address of the memory location being accessed [1]; the MDR (Memory Data Register) holds the data being read from or written to that memory location [1].
Q4 Describe what happens during the fetch stage of the fetch-decode-execute cycle. [3 marks]
✅ Mark scheme
Mark scheme answer (any 3)
• The address stored in the PC is copied to the MAR [1]
• The instruction at that address is fetched from RAM/memory [1]
• The instruction is placed into the MDR [1]
• The instruction is copied from the MDR to the CIR [1]
• The PC is incremented by 1 (to point to the next instruction) [1]
Q5 Explain the role of the Control Unit (CU) in the CPU. [2 marks]
✅ Mark scheme
Mark scheme answer
The Control Unit controls and coordinates all the activities of the CPU [1]; it fetches and decodes instructions and manages the timing/sequencing of all operations [1].
Q6 A student states: "The CPU only needs the ALU to process a program." Explain why this statement is incorrect. [3 marks]
✅ Mark scheme
Mark scheme answer (any 3)
• The ALU performs calculations but cannot fetch or decode instructions [1]
• The Control Unit is also needed to fetch and decode instructions and coordinate operations [1]
• Registers (e.g. PC, MAR, MDR) are required to hold addresses, data and instructions during processing [1]
• Cache is needed to provide fast access to frequently used data [1]
Q7 Describe the complete fetch-decode-execute cycle, naming all registers involved. [4 marks]
✅ Mark scheme
Mark scheme answer (4 marks)
Fetch: PC contents copied to MAR [1]; instruction fetched from RAM into MDR; copied to CIR; PC incremented [1]
Decode: CU decodes the instruction in the CIR [1]
Execute: ALU carries out the operation / data moved as required; result stored in Accumulator if arithmetic [1]
Q8 Explain the purpose of cache memory and how it improves CPU performance. [4 marks]
✅ Mark scheme
Mark scheme answer (4 marks)
• Cache is a small, fast type of memory located close to/inside the CPU [1]
• It stores frequently used/recently accessed instructions and data [1]
• The CPU can access data in cache much faster than from RAM [1]
• This reduces the time the CPU spends waiting for data, so it can execute instructions more quickly [1]
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Mini Test — 1.1.1 Architecture of the CPU

Put your knowledge to the test under timed, exam conditions. No feedback until you submit.

  • 10 questions · 10 marks · 10 minutes
  • 5 multiple choice + 5 short answer questions
  • No hints or immediate feedback
  • Answer all questions, then submit
  • Mark schemes revealed after submission
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