Machine Code

Machine code is the only language the CPU can execute directly — binary instructions that control the processor. Each instruction consists of:

• Opcode: specifies the operation (e.g. ADD, LOAD, JUMP) — binary pattern recognised by the CU
• Operand: the data or memory address the operation acts on

Example: 00100011 00001010 — opcode (LOAD) followed by operand (address 10 in binary)

Instruction Set Architecture (ISA)

The instruction set is the complete set of machine code operations a CPU can perform. Different CPU architectures (x86, ARM) have different instruction sets — meaning code compiled for one architecture does not run on another (portability problem).

Assembly Language

Assembly language is a low-level language that uses human-readable mnemonics instead of binary. Each assembly instruction maps directly to one machine code instruction.

LDR R0, 100    ; Load value from memory address 100 into register R0
ADD R1, R0, #5 ; Add 5 to R0, store result in R1
STR R1, 200    ; Store R1 into memory address 200
CMP R1, #20    ; Compare R1 with 20
BEQ END        ; Branch to END if equal

Assembly is converted to machine code by an assembler.

Addressing Modes

Status Registers and Flags

After ALU operations, flag bits in the status register are updated:

• Zero flag (Z): set if result = 0
• Carry flag (C): set if arithmetic overflows beyond word size
• Negative flag (N): set if result is negative
• Overflow flag (V): set if signed overflow occurs

Conditional branch instructions (BEQ, BNE, BGT) check these flags to decide whether to branch.

Instruction Formats

A typical 16-bit instruction word:

• Bits 15–12: Opcode (4 bits → 16 possible operations)
• Bits 11–8: Destination register
• Bits 7–0: Operand (address or immediate value)